Both vertical and lateral high voltage transistors are widely used in power applications. In the on state, it is desirable that the transistor have low on resistance to minimize conduction losses. In the off state, it is desirable that the transistor have a high breakdown or blocking voltage. Lateral RESURF transistors are lateral devices having a source and a drain laterally spaced from each other and having a drift region between the source and drain regions. In the on state, current flows between the source and drain through the drift region, while, in the off state, the drift region is depleted preventing current flow. In order to increase the performance characteristics of power transistors, U.S. Pat. No. 6,097,063, issued Aug. 1, 2000, inventor Fujihiro, and U.S. Pat. No. 6,207,994 B1, issued Mar. 27, 2001, inventors Rumennik et al., disclose the use in a lateral device of a drift region having alternating layers of semiconductive material of a first and second conductivity types (p/n). U.S. Pat. No. 5,216,275, issued Jan. 1, 1993, inventor Chen, and U.S. Pat. No. 5,438,215, issued Aug. 1, 1995, inventor Tihanyi, apply this concept to vertical devices. The following article is of interest in disclosing the use in a VDMOS device of metal-thick-oxide at the sidewalls of the drift region to either increase the blocking voltage or increase the background doping—“Oxide-Bypassed VDMOS (OBVDMOS0: An Alternative to Superjunction High Voltage MOS Power Devices”, by Liang et al., IEEE Electron Devices Letters, Vol. 22. No. 8, Pages 407-409, August 2001. An advantage of the current invention relative to these technologies is the use of four sided rather than two sided depletion regions when in the voltage blocking state.
There is a constant need for transistors with both high blocking voltage and ever lower on state resistance. The present invention addresses this need.